OCS_TMP/ocs/note-1113

GPU,Retimer,Channel,TRX Length,SLOT(RX为实际lane)

Topo Config:

ONOC1(0201040306050807): 0&1,3&2,4&5,7&6
ONOC2(0403020108070605): 0&3,1&2,4&7,5&6
ONOC3(0807060504030201): 0&7,1&6,4&3,5&2
ONOC4(0304010207080506): 0&2,1&3,4&6,5&7
ONOC5(0605080702010403): 0&5,3&6,4&1,7&2
ONOC6(0708050603040102): 0&6,3&5,4&2,7&1
ONOC7(0506070801020304): 0&4,3&7,1&5,2&6
ONETA(1111111111111111): 0&0,1&1,2&2,3&3,4&4,5&5,6&6,7&7
ONETB(1212121212121212): 0&0,1&1,2&2,3&3,4&4,5&5,6&6,7&7

Mapping List:
                                                                        物理Lane（Rx反转）
GPU4_L0 <-> Retimer1_TX00_3585 <-> SLOT0_L4 ----- Retimer1_RX00_3585 <-> SLOT0_L3 ===7170
GPU4_L1 <-> Retimer1_TX01_3519 <-> SLOT1_L4 ----- Retimer1_RX01_3763 <-> SLOT1_L3 ===7282
GPU4_L2 <-> Retimer1_TX02_2476 <-> SLOT2_L4 ----- Retimer1_RX02_3578 <-> SLOT2_L3 ===6054
GPU4_L3 <-> Retimer1_TX03_3654 <-> SLOT3_L4 ----- Retimer1_RX03_3448 <-> SLOT3_L3 ===7102
GPU4_L4 <-> Retimer1_TX04_3677 <-> SLOT4_L4 ----- Retimer1_RX04_3317 <-> SLOT4_L3 ===6994
GPU4_L5 <-> Retimer1_TX05_3154 <-> SLOT5_L4 ----- Retimer1_RX05_3357 <-> SLOT5_L3 ===6511
GPU4_L6 <-> Retimer1_TX06_3437 <-> SLOT6_L4 ----- Retimer1_RX06_3800 <-> SLOT6_L3 ===7237
GPU4_L7 <-> Retimer1_TX07_3405 <-> SLOT7_L4 ----- Retimer1_RX07_4414 <-> SLOT7_L3 ===7819
																				  ===
GPU7_L0 <-> Retimer1_TX08_3918 <-> SLOT0_L7 ----- Retimer1_RX08_3528 <-> SLOT0_L0 ===7446
GPU7_L1 <-> Retimer1_TX09_3666 <-> SLOT1_L7 ----- Retimer1_RX09_3740 <-> SLOT1_L0 ===7406      120/112：短时间ok
GPU7_L2 <-> Retimer1_TX10_3717 <-> SLOT2_L7 ----- Retimer1_RX10_3681 <-> SLOT2_L0 ===7398      150/200：一晚表现稍差(Tx14 CE)
GPU7_L3 <-> Retimer1_TX11_4016 <-> SLOT3_L7 ----- Retimer1_RX11_3524 <-> SLOT3_L0 ===7540      50/150：1104压测
GPU7_L4 <-> Retimer1_TX12_3645 <-> SLOT4_L7 ----- Retimer1_RX12_3610 <-> SLOT4_L0 ===7255
GPU7_L5 <-> Retimer1_TX13_4036 <-> SLOT5_L7 ----- Retimer1_RX13_3977 <-> SLOT5_L0 ===8013
GPU7_L6 <-> Retimer1_TX14_4919 <-> SLOT6_L7 ----- Retimer1_RX14_3508 <-> SLOT6_L0 ===8427      
GPU7_L7 <-> Retimer1_TX15_4573 <-> SLOT7_L7 ----- Retimer1_RX15_3670 <-> SLOT7_L0 ===8243
																				  ===
GPU0_L0 <-> Retimer2_TX00_3978 <-> SLOT0_L0 ----- Retimer2_RX00_5829 <-> SLOT0_L7 ===9807
GPU0_L1 <-> Retimer2_TX01_4331 <-> SLOT1_L0 ----- Retimer2_RX01_5693 <-> SLOT1_L7 ===10024
GPU0_L2 <-> Retimer2_TX02_4088 <-> SLOT2_L0 ----- Retimer2_RX02_6285 <-> SLOT2_L7 ===10373     100/0：一晚ok
GPU0_L3 <-> Retimer2_TX03_4604 <-> SLOT3_L0 ----- Retimer2_RX03_5508 <-> SLOT3_L7 ===10112     100/112：稍差
GPU0_L4 <-> Retimer2_TX04_4319 <-> SLOT4_L0 ----- Retimer2_RX04_5720 <-> SLOT4_L7 ===10039
GPU0_L5 <-> Retimer2_TX05_4756 <-> SLOT5_L0 ----- Retimer2_RX05_5905 <-> SLOT5_L7 ===10661
GPU0_L6 <-> Retimer2_TX06_4347 <-> SLOT6_L0 ----- Retimer2_RX06_6915 <-> SLOT6_L7 ===11262
GPU0_L7 <-> Retimer2_TX07_5146 <-> SLOT7_L0 ----- Retimer2_RX07_6691 <-> SLOT7_L7 ===11837
																				  ===
GPU3_L0 <-> Retimer2_TX08_4658 <-> SLOT0_L3 ----- Retimer2_RX08_4942 <-> SLOT0_L4 ===9600
GPU3_L1 <-> Retimer2_TX09_4472 <-> SLOT1_L3 ----- Retimer2_RX09_5239 <-> SLOT1_L4 ===9711
GPU3_L2 <-> Retimer2_TX10_4479 <-> SLOT2_L3 ----- Retimer2_RX10_6250 <-> SLOT2_L4 ===10729     
GPU3_L3 <-> Retimer2_TX11_4480 <-> SLOT3_L3 ----- Retimer2_RX11_5087 <-> SLOT3_L4 ===9567
GPU3_L4 <-> Retimer2_TX12_4515 <-> SLOT4_L3 ----- Retimer2_RX12_5243 <-> SLOT4_L4 ===9758
GPU3_L5 <-> Retimer2_TX13_4730 <-> SLOT5_L3 ----- Retimer2_RX13_4846 <-> SLOT5_L4 ===9576
GPU3_L6 <-> Retimer2_TX14_5346 <-> SLOT6_L3 ----- Retimer2_RX14_4835 <-> SLOT6_L4 ===10181
GPU3_L7 <-> Retimer2_TX15_5618 <-> SLOT7_L3 ----- Retimer2_RX15_5300 <-> SLOT7_L4 ===10918
																				  ===
GPU5_L0 <-> Retimer3_TX00_3524 <-> SLOT0_L5 ----- Retimer3_RX00_3516 <-> SLOT0_L2 ===7040
GPU5_L1 <-> Retimer3_TX01_4335 <-> SLOT1_L5 ----- Retimer3_RX01_3580 <-> SLOT1_L2 ===7915      180/200: 一晚产生CE
GPU5_L2 <-> Retimer3_TX02_3723 <-> SLOT2_L5 ----- Retimer3_RX02_3547 <-> SLOT2_L2 ===7270      160/112：基本ok
GPU5_L3 <-> Retimer3_TX03_3495 <-> SLOT3_L5 ----- Retimer3_RX03_3675 <-> SLOT3_L2 ===7170      150/112：？？？
GPU5_L4 <-> Retimer3_TX04_3802 <-> SLOT4_L5 ----- Retimer3_RX04_3125 <-> SLOT4_L2 ===6927
GPU5_L5 <-> Retimer3_TX05_3524 <-> SLOT5_L5 ----- Retimer3_RX05_2960 <-> SLOT5_L2 ===6484
GPU5_L6 <-> Retimer3_TX06_3647 <-> SLOT6_L5 ----- Retimer3_RX06_2416 <-> SLOT6_L2 ===6063      
GPU5_L7 <-> Retimer3_TX07_3183 <-> SLOT7_L5 ----- Retimer3_RX07_3639 <-> SLOT7_L2 ===6822
																				  ===
GPU6_L0 <-> Retimer3_TX08_6371 <-> SLOT0_L6 ----- Retimer3_RX08_5361 <-> SLOT0_L1 ===11732     tia_peak设置为0，对CE有改善
GPU6_L1 <-> Retimer3_TX09_6304 <-> SLOT1_L6 ----- Retimer3_RX09_4306 <-> SLOT1_L1 ===10610     60/0：一晚ok
GPU6_L2 <-> Retimer3_TX10_5160 <-> SLOT2_L6 ----- Retimer3_RX10_4167 <-> SLOT2_L1 ===9327      60/112：较差
GPU6_L3 <-> Retimer3_TX11_5242 <-> SLOT3_L6 ----- Retimer3_RX11_4394 <-> SLOT3_L1 ===9636      50/112：ok
GPU6_L4 <-> Retimer3_TX12_5237 <-> SLOT4_L6 ----- Retimer3_RX12_4191 <-> SLOT4_L1 ===9428
GPU6_L5 <-> Retimer3_TX13_5118 <-> SLOT5_L6 ----- Retimer3_RX13_4166 <-> SLOT5_L1 ===9284
GPU6_L6 <-> Retimer3_TX14_5156 <-> SLOT6_L6 ----- Retimer3_RX14_4242 <-> SLOT6_L1 ===9398
GPU6_L7 <-> Retimer3_TX15_5413 <-> SLOT7_L6 ----- Retimer3_RX15_4383 <-> SLOT7_L1 ===9796
																				  ===
GPU1_L0 <-> Retimer4_TX00_3788 <-> SLOT0_L1 ----- Retimer4_RX00_3424 <-> SLOT0_L6 ===7212
GPU1_L1 <-> Retimer4_TX01_4019 <-> SLOT1_L1 ----- Retimer4_RX01_3645 <-> SLOT1_L6 ===7664     180/200: 一晚ok
GPU1_L2 <-> Retimer4_TX02_3589 <-> SLOT2_L1 ----- Retimer4_RX02_3235 <-> SLOT2_L6 ===6824     160/112： 稍差
GPU1_L3 <-> Retimer4_TX03_3517 <-> SLOT3_L1 ----- Retimer4_RX03_3378 <-> SLOT3_L6 ===6895     150/112：？？？
GPU1_L4 <-> Retimer4_TX04_3502 <-> SLOT4_L1 ----- Retimer4_RX04_3514 <-> SLOT4_L6 ===7016
GPU1_L5 <-> Retimer4_TX05_3497 <-> SLOT5_L1 ----- Retimer4_RX05_3629 <-> SLOT5_L6 ===7126
GPU1_L6 <-> Retimer4_TX06_3585 <-> SLOT6_L1 ----- Retimer4_RX06_3824 <-> SLOT6_L6 ===7409
GPU1_L7 <-> Retimer4_TX07_3906 <-> SLOT7_L1 ----- Retimer4_RX07_3607 <-> SLOT7_L6 ===7513
																				  ===
GPU2_L0 <-> Retimer4_TX08_5395 <-> SLOT0_L2 ----- Retimer4_RX08_6109 <-> SLOT0_L5 ===11504
GPU2_L1 <-> Retimer4_TX09_6548 <-> SLOT1_L2 ----- Retimer4_RX09_5727 <-> SLOT1_L5 ===12275     60/0：一晚基本ok
GPU2_L2 <-> Retimer4_TX10_5378 <-> SLOT2_L2 ----- Retimer4_RX10_4535 <-> SLOT2_L5 ===9913      60/112：？？？
GPU2_L3 <-> Retimer4_TX11_5434 <-> SLOT3_L2 ----- Retimer4_RX11_4596 <-> SLOT3_L5 ===10030     50/112：ok
GPU2_L4 <-> Retimer4_TX12_5427 <-> SLOT4_L2 ----- Retimer4_RX12_4546 <-> SLOT4_L5 ===9973
GPU2_L5 <-> Retimer4_TX13_5515 <-> SLOT5_L2 ----- Retimer4_RX13_4686 <-> SLOT5_L5 ===10201
GPU2_L6 <-> Retimer4_TX14_5419 <-> SLOT6_L2 ----- Retimer4_RX14_4646 <-> SLOT6_L5 ===10065
GPU2_L7 <-> Retimer4_TX15_5411 <-> SLOT7_L2 ----- Retimer4_RX15_5163 <-> SLOT7_L5 ===10574









7170
7282
6054
7102
6994
6511
7237
7819

7446
7406
7398
7540
7255
8013
8427
8243

9807
10024
10373
10112
10039
10661
11262
11837

9600
9711
10729
9567
9758
9576
10181
10918

7040
7915
7270
7170
6927
6484
6063
6822

11732
10610
9327
9636
9428
9284
9398
9796

7212
7664
6824
6895
7016
7126
7409
7513

11504
12275
9913
10030
9973
10201
10065
10574